This invention relates, in general, to bonding together two surfaces, and more particularly, to methods of bonding a wafer to a submount.
Semiconductor manufacturers are constantly refining their fabrication processes to optimize semiconductor device performance while minimizing manufacturing costs and cycle time. Dual-side wafer processing is one approach to improving semiconductor device performance while maintaining relatively low manufacturing costs. For example, a semiconductor wafer may have a front-side and a back-side, wherein the front-side has undergone a series of processing steps. Subsequently, the front-side may be bonded to a submount with an adhesive material to allow processing of the back-side. Back-side processing may include grinding the back-side to thin the semiconductor wafer, or formation of semiconductor devices in the back-side. The submount provides protection to the front-side during the back-side processing as well as serving as a "handle" which supports the wafer and allows automated handling.
Many back-side processing steps require the backside of the semiconductor wafer to be flat and that a thickness of the adhesive material between the semiconductor wafer and the submount be uniform. Accordingly, it would be advantageous to have a method for bonding a semiconductor wafer to a submount such that the thickness of the adhesive material between the semiconductor wafer and the submount is uniform. Further, it is desirable that voids between the semiconductor wafer and the submount are not produced. More particularly, the method should eliminate gas bubbles that may form voids. In addition, the method should be easily integrated into a wafer processing flow.